Intel unveils glass substrates for chips to advance Moore’s Law

Intel mentioned it has made a major breakthrough within the growth of glass substrates for next-generation superior packaging in an try to remain on the previous of Moore’s Regulation.

The massive chip maker mentioned this milestone achievement is about to redefine the boundaries of transistor scaling, enabling the conclusion of data-centric functions and propelling the development of Moore’s Regulation, which predicts that the variety of transistors on a chip will double each couple of years. Intel mentioned it ought to be capable of make the bounce to glass substrates by the tip of the last decade. The corporate made the announcement forward of its Intel Innovation 2023 convention in San Jose, California this week.

Chip expertise has superior far over the previous six a long time because of this doubling impact. In 1971, Intel’s first microprocessor had 2,300 transistors. Now the corporate’s flagship chips have greater than 100 billion transistors. However a lot of that doubling got here from miniaturizing the width between chip circuits. That sort of advance has slowed down, as chips layers at the moment are on the atomic degree.

So Intel has been on the hunt for different methods to maintain chip expertise on the Moore’s Regulation treadmill. And it has discovered, oddly sufficient, a approach ahead by creating greater and greater chip packages, somewhat than smaller and smaller ones.

Glass permits Intel to create a 50% bigger chip space inside a package deal in order that Intel can match extra chips right into a single electrical package deal.

By the tip of the last decade, Intel foresees 30 trillion transistors might be packaged on a glass substrate with different improvements equivalent to 3D stacking of chips, mentioned Rahul Manepalli, an Intel Fellow and director of substrate module engineering, in a press briefing.

“We’re taking the wraps off our glass core substrate expertise, the place we see glass core substrate brings continued characteristic scaling,” he mentioned. “It permits us to do issues that an natural package deal can not do. It permits us to enhance the ability supply to those energy hungry, AI-centric, data-centric chips. It permits us to do excessive velocity I/O signaling that’s not potential in natural packages, particularly as you get to those switches with very excessive frequency at very low loss wants.”

Manepalli mentioned it permits excessive manufacturing yields and low prices. The glass substrates might be yet one more possibility for quicker and higher connectivity alongside the opposite enhancements like 3D packaging.

Chip packaging historical past

From the Seventies to Nineteen Nineties, early microprocessors used lead body wire packages. Then the {industry} made a transition to ceramic pins for packages. Then got here natural flip-chip ball-grid arrays (BGAs). The lead-free and halogen-free options got here within the early 2000s. Now Intel is making an attempt to pack extra chips in a single package deal. However there are limits to the natural packaging expertise.

Now the chip packages are getting greater and greater, and AI is driving demand for extra efficiency.

“We’re at an inflection level,” he mentioned. “We see glass core substrates allow vital enhancements to each electrical and mechanical properties. We’ve proven by a few of our inner research that we are able to truly rise up to 10 instances or extra by complete density in a glass core in comparison with an natural core.”

Intel has been pulling lots of methods currently to enhance interconnections between chips. It’s placing a number of chips right into a single digital package deal. Manepalli that Intel has been transport its present multi-die interconnect expertise since 2017.

The corporate has been scaling that from 55 micron die pitch in its factories to 45 microns and 36 microns. Intel has additionally been stacking with its 2.5D expertise since 2019, and it’s implementing its 3D chip stacking expertise Foveros for chip packages as effectively.

Benefits of glass substrates

Immediately’s chips sit on substrates that join them to a bigger circuit board, referred to as a motherboard. Copper interconnects are often used to electrically join a chip to the motherboard. However Intel has discovered a technique to do it quicker with glass.

For the previous decade, Intel has been doing analysis on glass. And prior to now 3.5 years, the corporate has finished accelerated “pathfinding” to convey a product to life. And it has built-in that effort with an R&D manufacturing facility line in Chandler, Arizona, fueled by a billion-dollar funding in glass processing. Intel has been working carefully with semiconductor tools, supplies and chemistry companions. Manepalli mentioned Intel has over 600 innovations within the space associated to substrates and glass expertise.

“We’re excited to take the wraps off of it and convey this to you and open this up for everybody to come back and collaborate with us within the area,” Manepalli mentioned.

In comparison with standard natural substrates, glass substrates supply a myriad of benefits, together with ultra-low flatness, enhanced thermal and mechanical stability, and considerably larger interconnect density. These distinctive properties empower chip architects to create high-density, high-performance chip packages particularly designed for data-intensive workloads, equivalent to synthetic intelligence (AI).

Glass substrates supply quite a few advantages, together with the flexibility to resist larger temperatures, 50% much less sample distortion, ultra-low flatness for improved depth of focus throughout lithography, and distinctive dimensional stability, enabling tight layer-to-layer interconnect overlay. These distinctive properties enable for a tenfold improve in interconnect density on glass substrates. Moreover, the improved mechanical properties of glass allow the creation of ultra-large form-factor packages with excessive meeting yields.

Intel mentioned it’s on monitor to introduce complete glass substrate options to the market within the latter half of this decade, making certain the continuation of Moore’s Regulation effectively past 2030.

Approaching the boundaries

Because the demand for extra highly effective computing will increase and the semiconductor {industry} strikes into the heterogeneous period that makes use of a number of “chiplets” in a package deal, enhancements in signaling velocity, energy supply, design guidelines and stability of package deal substrates might be important.

The semiconductor {industry} is approaching the boundaries of transistor scaling on silicon packages utilizing natural supplies. These supplies are suffering from limitations equivalent to elevated energy consumption, shrinkage, and warping.

Consequently, scaling transistors is changing into more and more difficult. Glass substrates current a viable and indispensable resolution for the subsequent technology of semiconductors, propelling the {industry} ahead.

Glass substrates possess superior mechanical, bodily, and optical properties, making them important for bettering signaling velocity, energy supply, design guidelines, and substrate stability.

These properties allow the connection of extra transistors inside a package deal, facilitating higher scaling and permitting for the meeting of bigger chiplet complexes, referred to as “system-in-package,” in comparison with present natural substrates. Chip architects can now obtain larger efficiency and density features inside a smaller footprint, offering better flexibility, decrease total value, and decreased energy consumption.

The preliminary functions for glass substrates will give attention to areas the place their benefits may be maximized, equivalent to information facilities, AI, and graphics-intensive workloads that require bigger kind issue packages and better velocity capabilities, Intel mentioned.

The tolerance of glass substrates to larger temperatures offers chip architects with flexibility in defining design guidelines for energy supply and sign routing. This flexibility permits the seamless integration of optical interconnects and the incorporation of inductors and capacitors into the glass throughout high-temperature processing.

Because of these distinctive properties, a ten instances improve in interconnect density is feasible on glass substrates. Additional, improved mechanical properties of glass allow ultra-large form-factor packages with very excessive meeting yields. That may convey the {industry} nearer to the purpose of scaling a trillion transistors on a package deal by 2030.

Intel has devoted over a decade to researching and evaluating the reliability of glass substrates as a substitute for natural substrates. The corporate has a wealthy historical past of driving developments in packaging expertise, together with main the {industry}’s transition from ceramic to natural packages and pioneering halogen and lead-free packages.

Intel’s experience in superior embedded die packaging applied sciences and lively 3D stacking has fostered a whole ecosystem of kit, chemical, and supplies suppliers, in addition to substrate producers.

The long run

Trying forward, Intel’s industry-leading glass substrates for superior packaging, coupled with current breakthroughs in PowerVia and RibbonFET applied sciences, display the corporate’s dedication to pushing the boundaries of compute expertise past the Intel 18A course of node. Intel is steadfast in its pursuit of reaching 1 trillion transistors in a package deal by 2030, and its ongoing innovation in superior packaging, together with glass substrates, will play a pivotal position in realizing this formidable purpose.

In abstract, he mentioned glass gives larger temperature tolerances and better interconnect density because of this. Glass substrates have ultra-low flatness, which ends up in higher picture seize. Intel can create finer threads by the ten instances higher interconnect density and drop these interconnects from the underside of the package deal to a different chip. Design flexibility and energy supply and sign routing turns into simpler. Glass also can join extra simply with optical tools.

Intel will know extra concerning the prices within the second half of the last decade, however Manepalli mentioned the corporate expects that it’ll have fewer layers on every chip and decrease prices because of this. Not the entire issues have been solved but, he mentioned, however Intel feels assured it is going to be in a position to overcome the challenges.